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English

ASIC+Hōʻike Hōʻike

ASIC hoʻolauna

ʻO ka moʻo T5L ka DGUS II dual-core ASIC.

●ʻO ka wikiwiki ʻana o ka lako 2D i kūkulu ʻia

●2.4GBytes/s kiʻekiʻe-wikiwiki MB bandwidth

●Kākoʻo i ka hoʻomohala ʻana i ka hoʻonohonoho PC a me ka simulation

●Kākoʻo i ka hoʻomaikaʻi mamao ʻana i hope

●Kākoʻo i ka hoʻonui code online e ka ʻōnaehana DGUS

●Nā pilina waiwai me 28IOs, 4 UARTs, 1 CAN, 8 12-bit (kākoʻo sampling ma luna o 16bit) A/Ds a me 2 16-bit PWM

110

SL kime

SLE028A

 T5L0+40Pin kumu+2.8-inihi 320*240 EWV(LN32240T028SA50)

SLI035A

 T5L0+40Pin kumu+3.5-inihi 320*480 IPS(LI48320T035IA30)

SLI040A

 T5L0+40Pin kumu+4.0-inihi 480*800 IPS(LI48800T040HA50)

SLI040B

 T5L0+50Pin kumu+4.0-inihi 480*480 IPS(LI48480T040HA30)

SLI043A

 T5L0+40Pin socket+4.3-inihi 480*800 IPS(LI48800T043TA30 ākea, 480*270 loaʻa pū kekahi)

SLI043B

 T5L0+40Pin socket+4.3-inihi 480*800 IPS(LI48800T043TB30 vertical, bezel haiki)

SLE043A

 T5L0+40Pin kumu+4.3-inihi 480*272 EWV(LN48272T043IB35)

SLC043A

 T5L0+40Pin kumu+4.3-inihi 480*272 TV(LN48272C043BA25)

SLI050A

 T5L0+40Pin kumu+5.0-inihi 480*854 IPS(LI85480T050HD45)

SLC070A

 T5L0+50Pin kumu+7.0-inihi 800*480 TV(LN80480C070BA20)
2

(SLE043A)

1

(SLI040B)

Nā hiʻohiʻona nui

●ʻO ASIC i hoʻolālā ponoʻī.

●ʻO ke kumukūʻai piha haʻahaʻa a me ka maikaʻi kiʻekiʻe.

●Nui ka hoʻouna ʻana a me ka hāʻawi ʻana i ka manawa.

●He kūpono no nā mea kūʻai aku me ka hiki ke hoʻomohala.

T5L ASIC+LCM+pilipili

Hoʻohana ʻo Dual-core T5L i ka 8051 core hiki ke hiki i ke alapine nui o 350MHz (T5L1/2) a me 400MHz (T5L0) ma hope o ka hoʻolālā hoʻohui.

Holo kaʻawale ka GUI core a me OS core.Hoʻomaopopo ka GUI core i ka hōʻike LCD aʻo ka OS core i hoʻomohala ʻia e hoʻokō i ka mana o nā peripheral e like me nā relays a me nā mea ʻike ma o IOs, ADs, PWMs a me nā pilina ʻē aʻe.

T5L ASIC+LCM+TP+pilipili

Ke alakaʻi nei ka T5L ASIC GUI core i nā pine paʻi, hiki ke hoʻopili koke ʻia i ka TP e hoʻomalu i ka RTP a i ʻole CTP, a e ʻike i ka hōʻike hoʻohui a me ka mana paʻi ma ka hoʻohālikelike ʻana i ka LCM a me ka hoʻolālā mana nui.

Papa hoʻomohala

Inā makemake ʻoe iā DWIN ASIC + screen solution, ʻo ka papa hoʻomohala kahi koho maikaʻi e kamaʻāina ai i ke ʻano hoʻomohala.

5
4
ʻAno Hoʻohālike Pepa ʻikepili Kiʻi 3D ʻŌlelo
WTC WTC
TA/DGUS II EKT028 √ √ T5L0 ASIC 2.8 iniha, 240×320, 262K kala, TN
TA/DGUS II EKT035A √ × T5L0 ASIC 3.5 iniha, 320×240, 262K kala, IPS
TA/DGUS II EKT035B √ × T5L0 ASIC 3.5-inihi, 480×320, 262K kala, IPS
TA/DGUS II EKT040A √ × T5L0 ASIC 4.0 iniha, 480×480, 262K kala, IPS
TA/DGUS II EKT040B √ × T5L0 ASIC 4.0-inihi, 800×480, 262K kala, IPS
TA/DGUS II EKT041 √ × T5L1 ASIC 4.1 iniha, 720×720, 16.7M kala, IPS
TA/DGUS II EKT043 √ × T5L1 ASIC 4.3 iniha, 480×272, 16.7M kala, TN
TA/DGUS II EKT043B √ × T5L0 ASIC 4.3 iniha, 480×800, 262K kala, IPS
TA/DGUS II EKT043C √ × T5L0 ASIC 4.3 iniha, 480×272, 262K kala, TN
TA/DGUS II EKT043D √ × T5L0 ASIC 4.3 iniha, 480×800, 262K kala, IPS
TA/DGUS II EKT043E √ × T5L0 ASIC 4.3-inihi, 800×480, 262K kala, IPS
TA/DGUS II EKT050A √ × T5L0 ASIC 5.0-inihi, 800×480, 262K kala, TN
TA/DGUS II EKT050B √ × T5L0 ASIC 5.0-inihi, 480×854, 262K kala, IPS
TA/DGUS II EKT050C √ × T5L2 ASIC 5.0-inihi, 1280×720, 16.7M kala, IPS
TA/DGUS II EKT056 √ × T5L1 ASIC 5.6 iniha, 640×480, 16.7M kala, IPS，
TA/DGUS II EKT057 √ × T5L0 ASIC 5.7-inihi, 640×480, 262K kala, TN
TA/DGUS II EKT065 √ × T5L0 ASIC 6.5 iniha, 640×480, 262K kala, TN
TA/DGUS II EKT068 √ × T5L2 ASIC 6.8 iniha, 1280×480, 16.7M kala, IPS
TA/DGUS II EKT070A √ × T5L0 ASIC 7.0-inihi, 800×480, 262K kala, TN
TA/DGUS II EKT070C √ √ T5L2 ASIC 7.0-inihi, 1024×600, 16.7M kala, IPS
TA/DGUS II EKT070D √ × T5L2 ASIC 7.0-inihi, 1280×800, 16.7M kala, IPS
TA/DGUS II EKT080A √ × T5L1 ASIC 8.0-inihi, 800×600, 16.7M kala, TN
TA/DGUS II EKT080B √ × T5L2 ASIC 8.0-inihi, 1024×768, 16.7M kala, IPS
TA/DGUS II EKT080C √ × T5L2 ASIC 8.0-inihi,1280×800, 16.7M kala, IPS
TA/DGUS II EKT084 √ × T5L1 ASIC 8.4-inihi, 800×600, 16.7M kala, TN
TA/DGUS II EKT088 √ × T5L2 ASIC 8.8 iniha, 1920×480, 16.7M kala, IPS
TA/DGUS II EKT097 √ × T5L2 ASIC 9.7-inihi, 1024×768, 16.7M kala, TN
TA/DGUS II EKT101A √ × T5L2 ASIC 10.1 iniha, 1024×600, 16.7M kala, IPS
TA/DGUS II EKT101B √ × T5L2 ASIC 10.1 iniha, 1280×800, 16.7M kala, IPS

●Pākuʻi pākuʻi Capacitive.

●20 IO, 4 UART, 1 CAN, 2 PWM a me 6 12-bit AD.

●JTAG interface no ka emulation pūnaewele a me ka debugging.

●Hiki i ka heluhelu a me ke kākau ʻana i nā ʻano like ʻole DGUS, debugging a hoʻoiho pololei i nā papahana UI ma o ka USB interface.

●2 128M-bit SPI NOR Flash interface a me 1 1Gbit SPI NAND Flash interface.

●ʻO T5L OS core ka 200MHz 1T kiʻekiʻe-wikiwiki 8051, me ka 64KB code space, 32KB on-chip RAM, 64bit integer MAC a me ka lako mea hoʻokaʻawale.